FPSLabs : AMD Phenom erratum fix causes 10% performance penalty

AMD Phenom erratum fix causes 10% performance penalty

Posted by in December 4th, 2007

Posted in: Latest

An error in the L3 cache of all Phenom CPUs demands a BIOS update - at a cost.

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Via Tech Report: “We reported earlier today that a problem with AMD’s quad-core processors has limited supply of “Barcelona” Opterons, but that is only part of the picture. Because the hardware bug—known as an erratum—affects all revisions and clock speeds of AMD’s quad-core processors, it affects the newly introduced Phenom 9500 and 9600 processors, as well. And although AMD is no longer shipping quad-core Opterons to major server vendors and general customers, it is shipping Phenoms to large PC builders and distributors. In fact, AMD knew about the erratum before the Phenom product launch, although its original statements about the issue gave the impression it only affected Phenoms clocked at 2.4GHz or higher.

To recap, the erratum is a chip-level issue involving the TLB logic for the L3 cache that can cause system hangs in specific circumstances. AMD has a fix for the problem in the works, but it degrades performance. AMD has stated publicly that the workaround can lower performance by as much as 10%, although one source characterized the performance hit to TR as 10-20%.

In order to better understand this problem, TR spoke with Michael Saucier, Desktop Product Marketing Manager at AMD. Saucier confirmed that the TLB erratum can cause the system to hang when the chip is experiencing high utilization. AMD has stated previously that virtualization workloads can lead to this problem, but Saucier clarified that other workloads can trigger system hangs, as well. He characterized the issue as a race condition in the TLB logic “where the other guy wins who isn’t supposed to win,” and said the likelihood of the erratum causing a system hang is extremely rare.

Apparently contradicting prior AMD statements on the matter, Saucier flatly denied any relationship between the TLB erratum and chip clock frequencies. He also said there’s no relationship between clock speeds and the performance degradation caused by the BIOS-based fix for the erratum. AMD had previously cited the TLB erratum as the primary motivation behind its decision to delay the 2.4GHz Phenom variant.“